This invention relates in general to semiconductor wafer processing apparatus and relates more particularly to the use of a plasma apparatus for wafer cleaning, wafer deposition and wafer etching. For example, the plasma etching of wafers is attractive because it can be anisotropic, can be chemically selective, can produce etch under conditions far from thermodynamic equilibrium, utilizes a reduced amount of etchant chemicals compared to wet etch processes and produces a significantly reduced amount of waste products. The reduction of etchant chemicals and waste products produces a cost savings. The anisotropic etch enables the production of substantially vertical sidewalls which is important in present day processes in which the depth of etch and feature size and spacing are all comparable. The ability to choose etch chemicals and process parameters to produce chemical selectivity of the etch enables these choices to be made to etch the desired material without substantially etching other features of the integrated circuits being produced. Choices of process parameters that produce process conditions far from thermodynamic equilibrium can be used to lower process temperature, thereby avoiding high temperatures that can deleteriously affect the integrated circuits under fabrication.
In FIG. 1 is shown a plasma reactor 10. This reactor includes an aluminum wall 11 that encloses a plasma reactor chamber 12. Wall 11 is grounded and functions as one of the plasma electrodes. Gases are supplied to chamber 12 from a gas source 13 and are exhausted by an exhaust system 14 that actively pumps gases out of the reactor to maintain a low pressure suitable for a plasma process. An rf power supply 15 provides power to a second (powered) electrode 16 to generate a plasma within chamber 12. Wafers 17 are transferred into and out of reactor chamber 12 through a port such as slit valve 18.
A plasma consists of two qualitatively different regions: the substantially neutral, conductive plasma body 19 and a boundary layer 110 called the plasma sheath. The plasma body consists of substantially equal densities of negative and positive charged particles as well as radicals and stable neutral particles. The plasma sheath is an electron deficient, poorly conductive region in which the electric field strength is large. The plasma sheath forms between the plasma body and any interface such as the walls and electrodes of the plasma reactor chamber and the rf electrodes.
Semiconductor process plasmas are produced by a radio frequency (rf) field at 13.56 MHz that couples energy into free electrons within the chamber, imparting sufficient energy to many of these electrons that ions can be produced through collisions of these electrons with gas molecules. Typically, the walls of the reactor chamber are metal (though often coated with thin insulating layers) so that they can function as one of the rf electrodes. When the walls do not function as one of the electrodes, they still affect the process by confining the plasma and by contributing capacitive coupling to the plasma reactor.
The 13.56 MHz frequency is substantially universally utilized in plasma reactors because this frequency is an ISM (Industry, Scientific, Medical) standard frequency for which the government mandated radiation limits are less stringent than at non-ISM frequencies, particularly those within the communication bands. This substantial universal use of 13.56 MHz is further encouraged by the large amount of equipment available at that frequency because of this ISM standard. Other ISM standard frequncies are at 27.12 and 40.68 MHz, which are first and second order harmonics of the 13.56 MHz ISM standard frequency. A further advantage of the 13.56 MHz frequency is that, since the lowest two order harmonics of this frequency are also ISM standard frequencies, equipment utilizing 13.56 MHz is less likely to exceed allowable limits at harmonics of the fundamental frequency of such equipment.
When the powered rf electrode is capacitively coupled to the rf power source, a dc self bias V.sub.dc of this electrode results. The magnitude of this self bias V.sub.dc is a function of the ion density and electron temperature within the plasma. A negative self-bias dc voltage V.sub.dc of the powered electrode on the order of several hundreds of volts is commonly produced (see, for example, J. Coburn and E. Kay, Positive-ion bombardment of substrates in rf diode glow discharge sputtering, J. Appl. Phys., 43, p. 4965 (1972). This self bias dc voltage V.sub.dc is useful in producing a high energy flux of positive ions against the powered electrode. Therefore, in a plasma etching process, a wafer 17 to be etched is positioned on or slightly above the powered electrode 16 so that this flux of positive ions is incident substantially perpendicular to the top surface of the wafer, thereby producing substantially vertical etching of unprotected regions of the wafer.
These high voltages enable etch rates that are required for the etch process to be commercially attractive. Because of the susceptibility of the small (submicron) geometry devices available today to damage by a small amount of particulates, integrated circuit (IC) process systems are available that enable several IC process steps to be executed before reexposing the wafer to ambient atmosphere (see, for example, the multichamber system illustrated in U.S. Pat. No. 4,785,962 entitled Vacuum Chamber Slit Valve, issued to Masato Toshima on Nov. 22, 1988). This small geometry has also produced a trend toward single wafer process steps (as opposed to multiwafer processing steps that are common in larger geometry devices) so that processing can be sufficiently uniform over the entire wafer that these small geometry features can be produced throughout the wafer.
Because the wafer throughput of the system is limited to the throughput of the slowest of the series of process steps within such a system, it is important that none of these sequential steps take significantly longer than the other steps in the process or else such slow step will serve as a bottleneck to system throughput. Presently, typical system throughput is on the order of 60 wafers per hour. For example, the fundamental etch prior to metal-2 deposition is performed at a rate equivalent to a 250 Angstroms per minute silicon dioxide etch rate. This permits the removal of approximately 70 Angstroms of aluminum oxide in contacts to aluminum metal-1 in approximately 40 seconds using a nonselective argon-only process. These etch conditions are used routinely in wafer fabrication and produce a 1500-1600 volt self bias at the powered electrode.
Transistor speed specifications and high device densities in the most modern MOS integrated circuits have required the use of shallow junctions and thin gate oxides. Unfortunately, such IC structures are sensitive to ion bombardment by high energy ions such as those utilized with conventional 13.56 MHz plasma etch apparatus. Therefore, it is advantageous in such IC processing to reduce the self-bias voltage of the powered electrode to less than 500 volts negative self-bias using a nonselective argon-only process. Because wafer damage decreases with decreasing self-bias voltage, it would be even more advantageous to operate at self-bias voltages closer to 300 V. Unfortunately, at 13.56 MHz, this reduction of self-bias results in a much slower etch rate, which thereby significantly degrades process throughput.
One solution has been to enhance the etch rate by use of magnets that produce containment fields that trap ions within the vicinity of the wafer, thereby increasing the ion density at the wafer. The magnetic field confines energetic ions and electrons by forcing them to spiral along helical orbits about the magnetic field lines. Such increased ion density at the wafer produces a concomitant increase in etch rate without increasing the self bias potential, thereby enabling throughputs on the order of 60 wafers per hour without damaging the wafers. In effect, the etch rate is preserved by increasing the current level to counter the decreased voltage drop across the plasma sheath at the wafer. Unfortunately, nonuniformities of the magnetic field of such "magnetically enhanced" plasma etching systems exhibit a decreased uniformity of etch rate over the surface of the wafer.
To improve uniformity over the surface of the wafer, in one such system, the wafer is rotated about an axis that is perpendicular to and centered over the surface of the powered electrode. This produces at the wafer surface a time-averaged field that has cylindrical symmetry and an improved uniformity over the wafer and therefore produces increased etch uniformity over the surface of the wafer. However, this rotation produces within the plasma chamber undesirable mechanical motion that can produce particulates and increase contamination. Alternatively, a rotating magnetic field can be produced by use of two magnetic coils driven by currents that are ninety degrees out of phase. Unfortunately, the controls and power supplies for this scheme are relatively expensive and the etch uniformity is still not as good as in a plasma etch apparatus that does not include such magnets.
Another solution to enhance the rate of plasma processing of wafers is the recently developed technique of electron cyclotron resonance. This technique has application to wafer cleaning, etching and deposition processes. In this technique, a plasma is produced by use of a microwave source and a magnetic containment structure. Unfortunately, this technique, when applied to etching or chemical vapor deposition, exhibits poor radial uniformity and low throughput. In addition, it requires expensive hardware that includes: (1) a complex vacuum pumping system; (2) a microwave power supply that must produce microwave power at an extremely accurate frequency and power level; (3) a large magnetic containment system that may include large electromagnets; and (4) an rf or dc power supply connected to the wafer electrode.